ScholarWorks Community:https://scholarworks.sookmyung.ac.kr/handle/2021.sw.sookmyung/5782024-03-21T08:46:24Z2024-03-21T08:46:24ZA Time-Based Direct MPPT Technique for Low-Power Photovoltaic Energy HarvestingMaeng, J.Jeong, J.Park, I.Shim, M.Kim, C.https://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/1595962024-01-29T03:00:26Z2024-05-01T00:00:00ZTitle: A Time-Based Direct MPPT Technique for Low-Power Photovoltaic Energy Harvesting
Authors: Maeng, J.; Jeong, J.; Park, I.; Shim, M.; Kim, C.
Abstract: This letter introduces a maximum power point tracking (MPPT) technique for photovoltaic (PV) energy harvesting (EH) systems to enhance the end-to-end efficiency (ηE-E) when the output power of PV cell (PPV,MAX) is low. A ripple-based PV cell current sensing and a time domain multiplication are proposed to monitor the PV cell power delivered to the charger, which reduces the controller power consumption (PCTR). The PV EH system with the proposed MPPT method is implemented in a 180-nm CMOS process. The PCTR is 1.34 μW. The measured ηE-E at low PPV,MAX (13 μW) is 88%. The measured peak ηE-E is 94.4% at 82 μW. IEEE2024-05-01T00:00:00ZSpectral Trade-Off for Measurement Sparsification of Pose-Graph SLAMNam, JiyeonHyeon, SoojeongJoo, YoungjunNoh, DongKiShim, Hyungbohttps://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/1594972024-03-19T08:00:30Z2024-01-01T00:00:00ZTitle: Spectral Trade-Off for Measurement Sparsification of Pose-Graph SLAM
Authors: Nam, Jiyeon; Hyeon, Soojeong; Joo, Youngjun; Noh, DongKi; Shim, Hyungbo
Abstract: In this letter, we propose a trade-off optimization algorithm to compute an appropriate number of edges for measurement (edge) sparsification in pose-graph simultaneous localization and mapping (SLAM). The greater the amount of measurement data, the larger is the computational burden. To reduce computational burden, one can remove a portion of measurements. However, reliable data, such as odometric measurements, can be lost if measurements are removed without any principle. To remove measurements which is redundant, we propose a trade-off optimization algorithm between maximization of the Fiedler value and minimization of the largest eigenvalue of adjacency matrix for measurement graph. This problem formulation gives virtues twofold. First, it is scalable. For any dataset, when a weight for trade-off is given, this algorithm determines the appropriate number of edges since this is a trade-off optimization problem. Second, the edges of the measurement graph can be distributed evenly. The algorithm considers the minimization of the largest eigenvalue of the adjacency matrix, so it suppresses the upper bound of the maximum degree of the measurement graph. It removes the redundant information concentrated on a few nodes, and improves the estimation accuracy of the sparsified graph. To validate the performance of the proposed trade-off optimization algorithm, we apply our approach to CSAIL, Intel, and Manhattan datasets.2024-01-01T00:00:00ZHardware Efficient Transposable 8T SRAM for Orthogonal Data AccessChon, DainChoi, Woonghttps://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/1596012024-01-29T07:30:21Z2023-12-01T00:00:00ZTitle: Hardware Efficient Transposable 8T SRAM for Orthogonal Data Access
Authors: Chon, Dain; Choi, Woong
Abstract: This paper presents a novel 8T SRAM bitcell-based transposable (TP) memory supporting both row-wise and column-wise data access. The proposed TP-SRAM enables orthogonal data access with additional diagonal word-lines and a low-complexity addressing scheme. To reduce cell array area overhead, the proposed TP-SRAM adopts a bitcell structure that can share all aspects of layout with adjacent cells like standard 6T-SRAM. We also propose a bidirectional barrel shifter based on dynamic logic gates to minimize the hardware cost required for the TP addressing scheme. In the proposed bidirectional barrel shifter, area and delay are minimized by using two complementary dynamic inverting MUXs that can balance the number of NMOS and PMOS transistors. The proposed 16Kb TP-SRAM implemented in 28nm CMOS technology has 17% reduced power, 52% faster operation delay, and 39% smaller area compared to the state-of-the-art.2023-12-01T00:00:00ZSingle-User SFLC-OFDM System Realization Based on Channel Reciprocity RecoveryKim, SubinLee, Han-GyeolLee, SongminKim, JaehongJoung, JingonKim, Juyeophttps://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/1594652023-12-19T03:32:10Z2023-10-01T00:00:00ZTitle: Single-User SFLC-OFDM System Realization Based on Channel Reciprocity Recovery
Authors: Kim, Subin; Lee, Han-Gyeol; Lee, Songmin; Kim, Jaehong; Joung, Jingon; Kim, Juyeop
Abstract: This paper demonstrates the implementation of a space-frequency line coded-orthogonal frequency-division multiplexing (SFLC-OFDM) system. The SFLC-OFDM system utilizes downlink channel state information at the transmitter, which can be obtained from uplink channel estimation under channel reciprocity assumption between uplink-and-downlink channels. However, in practical implementations, channel reciprocity is violated due to the imperfect synchronization and radio frequency chain mismatch between transceivers. To recover the channel reciprocity, frequency-domain signal processing methods are proposed. Furthermore, a low computational complexity single-instruction multiple-data method is implemented to meet the time constraints in real-time operating systems. The experimental results demonstrate that channel reciprocity can be effectively recovered in the implemented SFLC-OFDM system, resulting in practical communication performance regarding the symbol error rate.2023-10-01T00:00:00Z