Gate-tunable diodes with negative transconductance based on inkjet printed heterojunctions

Abstract

Devices with negative transconductance (NTC) or negative differential resistance (NDR) have been attracting a great deal of attention in novel device applications because of their unique electrical characteristics. In such devices, there exist operation regions in which current decreases with an increase of bias voltage, whereas current monotonically increases with an increase of bias voltage in conventional devices. The NTC devices enable realization of multi-valued logic circuits, where higher bit density and lower power dissipation can be achieved by reduction of the number of devices and interconnects in integrated circuits. In this work, gate-tunable diodes with NTC will be demonstrated by constructing p-n heterojunctions composed of inkjet printed single-walled carbon nanotubes (SWCNTs) and indium oxide (InO). Surface conditions for the inkjet printed layers are adequately modified by plasma treatment to form continuous semiconducting layers on both dielectric and underlying semiconducting layers for the formation of partially overlapped p-n heterojunctions. The resultant devices show anti-ambipolar behavior, where drain-current increases until it reaches the maximum value then decreases as gate-voltage increases, which is opposite to the ambipolar behavior. The device characteristics based on partially overlapped p-n heterojunction and fully overlapped bilayer p-n heterojunction will be compared. Additional thirty printed heterojunction-based devices are fabricated, and the device characteristics are statistically analyzed to show their potential for reliable and scalable applications. Finally, inkjet printed ternary inverters, which possess three logic states, will be demonstrated by employing inkjet printed gate-tunable diodes with SWCNT transistors. © COPYRIGHT SPIE. Downloading of the abstract is permitted for personal use only.