Suppression of Interfacial Current Fluctuation in MoTe2 Transistors with Different Dielectrics
- Authors
- Ji, Hyunjin; Joo, Min-Kyu; Yun, Yoojoo; Park, Ji-Hoon; Lee, Gwanmu; Moon, Byoung Hee; Yi, Hojoon; Suh, Dongseok; Lim, Seong Chu
- Issue Date
- Jul-2016
- Publisher
- AMER CHEMICAL SOC
- Citation
- ACS Applied Materials Interfaces, v.8, no.29, pp 19092 - 19099
- Pages
- 8
- Journal Title
- ACS Applied Materials Interfaces
- Volume
- 8
- Number
- 29
- Start Page
- 19092
- End Page
- 19099
- URI
- https://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/146242
- DOI
- 10.1021/acsami.6b02085
- ISSN
- 1944-8244
1944-8252
- Abstract
- For transition metal dichalcogenides, the fluctuation of the channel current due to charged impurities is attributed to a large surface area and a thickness of a few nanometers. To investigate current variance at the interface of transistors, we obtain the low-frequency (LF) noise features of MoTe2 multilayer field-effect transistors with different dielectric environments. The LF noise properties are analyzed using the combined carrier mobility and carrier number fluctuation model which is additionally parametrized with an interfacial Coulomb-scattering parameter (a) that varies as a function of the accumulated carrier density (Nacc) and the location of the active channel layer of MoTe2. Our model shows good agreement with the current power spectral density (PSD) of MoTe2 devices from a low to high current range and indicates that the parameter a exhibits a stronger dependence on Nacc with an exponent -gamma, of -1.18 to approximately -1.64 for MoTe2 devices, compared with -0.5 for Si devices. The raised Coulomb scattering of the carriers, particularly for a low-current regime, is considered to be caused by the unique traits of layered semiconductors such as interlayer coupling and the charge distribution strongly affected by the device structure under a gate bias, which completely change the charge screening ef
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