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Optimization of Matrix-Matrix Multiplication Algorithm for Matrix-Panel Multiplication on Intel KNL

Authors
Rizwan, MuhammadJung, EnochPark, YoosangChoi, JaeyoungKim, Yoonhee
Issue Date
Dec-2022
Publisher
IEEE Computer Society
Keywords
AVX-512; Intel Knights Landing; matrix-matrix multiplication; QR factorization; ScaLAPACK
Citation
Proceedings of IEEE/ACS International Conference on Computer Systems and Applications, AICCSA, v.2022-December
Journal Title
Proceedings of IEEE/ACS International Conference on Computer Systems and Applications, AICCSA
Volume
2022-December
URI
https://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/152162
DOI
10.1109/AICCSA56895.2022.10017947
ISSN
2161-5322
2161-5330
Abstract
The most scientific and numerical problems can be solved using the system of equations in linear algebra. Matrix-matrix multiplication is the foundation of linear algebra equations, and its optimization has an impact on the overall performance of a system. ScaLAPACK has established itself as the industry standard for dense linear algebraic computations, developed 30 years ago. Owing to advancements in microprocessor architectures, it is difficult to fully utilize the hardware capabilities of legacy software systems on modern architectures and achieve the maximum performance. In this study, we analyzed the effects of matrix size, register blocking parameters, and thread distribution on the performance, and improved our previously implemented matrix-matrix multiplication routine for matrix-panel multiplication, which performed well for large-sized square matrices. We also presented the ScaLAPACK QR factorization performance by replacing the double-precision general matrix-matrix multiplication routine (DGEMM) of ScaLAPACK with our matrix-matrix multiplication routine for a single node Intel Xeon Phi Knights Landing processor. © 2022 IEEE.
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공과대학 (소프트웨어학부(첨단))
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