Macro Modeling Approach for Semi-digital Smart Integrated Circuits

초록

This work presents a macro modeling approach for semi-digital smart integrated circuits. The proposed macro model models the behavior of the key circuit block used for semi-digital smart integrated circuits which is the time-to-voltage converter. Furthermore, the macro model can accurately analyze the non-idealities and error sources which can be used as the guideline for design optimization and calibration scheme implantation of semi-digital smart integrated circuits.