ScholarWorks@숙명여자대학교

초록

As main memory access has become a performance bottleneck for main memory-based applications in modern computing environments, a central processing unit (CPU) cache has been introduced to reduce the average latency of memory access. In main memory database areas, although T-Tree is regarded as one of the prominent index structures for main memory, it does not take account of a CPU cache. In order to improve upon the performances of T-Tree by exploiting the cache, a cache sensitive T-Tree (CST-Tree) has been proposed. However, CST-Tree has limitations on range search, because unnecessary nodes are traversed. Therefore, we propose CST+-Tree which has the merits of CST-Tree, but CST+-Tree allows for efficient range search by linking data nodes with linked lists. In range search, we revealed that CST+-Tree was about 60% faster in the Sun system and 70% faster in the Intel system than CST-Tree. Moreover, in point search, CST+-Tree and CST-Tree exhibited a similar performance.

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