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초록
A dual-path step-down converter (DPDC) is presented for achieving high power efficiency in the mobile power management ICs (PMICs). Adopting a hybrid structure using one inductor and one flying capacitor, the proposed DPDC supplies a load current via two parallel paths, relieved an intrinsic problem of the conventional buck converter (CBC) topology, which is a significant power loss from a large DCR of the inductor (R-DCR). Therefore, DPDC achieves a high power efficiency and thus also reduces the heating problem, which is another critical issue in the mobile set. Moreover, DPDC can shrink the volume of the PMIC set with a low manufacturing cost by alleviating an R-DCR specification of the inductor. In this paper, although a 250 m Omega of large R-DCR inductor is used for our measurements, a 96.2% of peak efficiency was achieved and the power loss of total parasitic resistances can be reduced to up to 30% of that of CBC. Moreover, according to our measurement plots, it is verified that DPDC achieves the efficiency notably higher not only in a wide load current (I-LOAD) range but also in a wide conversion ratio (V-OUT/V-IN) range, compared to CBC.
키워드
- 제목
- A Hybrid Structure Dual-Path Step-Down Converter With 96.2% Peak Efficiency Using 250-m Omega Large-DCR Inductor
- 저자
- Huh, Yeunhee; Hong, Sung-Wan; Cho, Gyu-Hyeong
- 발행일
- 2019-01
- 유형
- Article; Proceedings Paper
- 권
- 54
- 호
- 4
- 페이지
- 959 ~ 967