Self-defined dual charge percolation networks for solution-processed multithreshold transistors
  • Moon, Jung Woo
  • Kim, Seunghan
  • Kim, Jin Hyeon
  • Barma, Sunil V.
  • Jeong, Sang Young
  • ... Lim, Ho Sun
  • 외 6명
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초록

This study demonstrates multithreshold engineering of a solution-processed heterojunction electrochemical transistor using a blend of n-type CdSe tetrapod-shaped nanocrystals (TpNCs) and an n-type polymeric organic semiconductor (OSC). The unique geometry of TpNCs enables a broad concentration range of charge percolation, where charge transfer between TpNC and OSC domains determines multiple threshold voltages. The OSC domain's threshold voltage shifts from 1 to -1 V as TpNC content increases, while the TpNC domain maintains a threshold above 1.5 V. This allows for stable intermediate states, crucial for multivalued logic operations. Charge percolation and photoluminescence studies show selective charge redistribution, shifting the threshold voltages in the polymer networks. Ternary logic gates, including TNOT, TNAND, and TNOR, based on these heterojunction transistors, were also demonstrated, highlighting the potential of this approach for advanced logic applications.

키워드

TRANSPORTLOGICCELLS
제목
Self-defined dual charge percolation networks for solution-processed multithreshold transistors
저자
Moon, Jung WooKim, SeunghanKim, Jin HyeonBarma, Sunil V.Jeong, Sang YoungKeum, JinhoLim, Ho SunYoo, YoungjaeWoo, Han YoungJo, Sae ByeokKang, Moon SungCho, Jeong Ho
DOI
10.1038/s41528-024-00372-6
발행일
2024-12
유형
Article
저널명
NPJ FLEXIBLE ELECTRONICS
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