ScholarWorks@숙명여자대학교

초록

Large Language Models (LLMs) has become a significant concern due to the rapid development of Open AI series GPT and other applications. As model size and complexity increase, they demand much higher operational costs, i.e., hardware resources and energy consumption. One approach to address these challenges is the implementation of a wider dynamic range with low bits. Posit, the next-generation number system, provides a wider dynamic range and higher accuracy than conventional IEEE-754 Standard floating-point numbers. In this work, to facilitate the use of posit number formats in LLM applications, we present an efficient architecture for posit multiply-ac-cumulate (MAC). Experimental results demonstrate that the proposed architecture can reduce the power delay product (PDP) by 13.7% compared to prior work.

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