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Compact Single-Stage Input and Output Rail-to-Rail Class AB Buffer Amplifier With an Asymmetric Output Structure
- Oh, Young-Ju;
- Jeong, Hyun-Woo;
- Park, Hyeonho;
- Shin, Jeeyoung;
- Jeong, Junwon;
- ... Choi, Woong;
- 외 1명
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This letter presents a compact single-stage buffer amplifier designed to drive a wide range of capacitive loads (C-L). To further reduce power consumption and silicon area compared to previous single-stage rail-to-rail amplifiers, this letter proposes an asymmetric rail-to-rail class AB output structure. To achieve a high slew rate, the proposed amplifier employs positive feedback loops and a dynamic floating node. A prototype chip successfully drove a wide range of C-L, from 250 pF to 15 nF, while achieving a fast transient response. The chip was fabricated using a 0.18- mu m CMOS process.
키워드
Transistors; Periodic structures; Logic gates; Voltage; Rail to rail inputs; Tail; Rail to rail amplifiers; MOS devices; Steady-state; Gain; Class-AB; compact single-stage buffer amplifier (AMP); high slew rate (SR); input and output rail-to-rail; wide range capacitive load
- 제목
- Compact Single-Stage Input and Output Rail-to-Rail Class AB Buffer Amplifier With an Asymmetric Output Structure
- 저자
- Oh, Young-Ju; Jeong, Hyun-Woo; Park, Hyeonho; Shin, Jeeyoung; Jeong, Junwon; Choi, Woong; Hong, Sung-Wan
- 발행일
- 2025-03
- 유형
- Article
- 저널명
- IEEE SOLID-STATE CIRCUITS LETTERS
- 권
- 8
- 페이지
- 73 ~ 76