Analyzing Data Locality on GPU Caches using Static Profiling of Workloads
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Jieun | - |
dc.contributor.author | Eom, Hyeonsang | - |
dc.contributor.author | Kim, Yoonhee | - |
dc.date.accessioned | 2023-12-13T01:56:26Z | - |
dc.date.available | 2023-12-13T01:56:26Z | - |
dc.date.issued | 2023-08 | - |
dc.identifier.issn | 2169-3536 | - |
dc.identifier.issn | 2169-3536 | - |
dc.identifier.uri | https://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/159033 | - |
dc.description.abstract | The diversity of workloads drives studies to use GPU more effectively to overcome the limited memory of GPUs. Precisely, it is essential to understand and utilize data locality of workloads to utilize the memory and cache efficiently, which is relatively smaller than CPU’s. It is important to understand GPU memory hierarchy to efficiently use with multi-thread environment. Although there have been previous approaches to analyzing data locality on GPUs, these approaches focused on global memory and L2 cache levels with profiling at thread block levels. The data locality study in warp level in GPU has not been studied much. Especially, the concept of coalescing has been defined but the method of measuring the degree of coalescing has not been discussed. In this paper, we analyze data locality in L1 cache levels, which is the smallest but fastest in cache level to analyze the impact of data locality. To achieve this analysis, we profile data locality in warp level, which is smallest segment in GPU thread groups. We define the degree of coalescing besides static profiling of data locality and provide the estimation of refined locality from profiling of L1 cache data access patterns. As a proof-of-concept, the estimation using the proposed method are evaluated with the performance comparison to diverse real-world GPU benchmarks such as Rodina and Polybench. The locality metrics with coalescing on experiments showed meaningful correlation with cache utilization for performance enhancement. Author | - |
dc.format.extent | 9 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | Analyzing Data Locality on GPU Caches using Static Profiling of Workloads | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1109/ACCESS.2023.3307315 | - |
dc.identifier.scopusid | 2-s2.0-85168756471 | - |
dc.identifier.wosid | 001081653200001 | - |
dc.identifier.bibliographicCitation | IEEE Access, v.11, pp 95939 - 95947 | - |
dc.citation.title | IEEE Access | - |
dc.citation.volume | 11 | - |
dc.citation.startPage | 95939 | - |
dc.citation.endPage | 95947 | - |
dc.type.docType | Article | - |
dc.description.isOpenAccess | Y | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Telecommunications | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Telecommunications | - |
dc.subject.keywordAuthor | Codes | - |
dc.subject.keywordAuthor | Correlation | - |
dc.subject.keywordAuthor | Data locality | - |
dc.subject.keywordAuthor | Estimation | - |
dc.subject.keywordAuthor | GPGPU workload analysis | - |
dc.subject.keywordAuthor | GPU cache | - |
dc.subject.keywordAuthor | GPU profiling | - |
dc.subject.keywordAuthor | Graphics processing units | - |
dc.subject.keywordAuthor | Instruction sets | - |
dc.subject.keywordAuthor | Memory management | - |
dc.subject.keywordAuthor | Message systems | - |
dc.subject.keywordAuthor | PTX code | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/10225495 | - |
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