<inline-formula> <tex-math notation=LaTeX>$\mathbf{T^3L}$</tex-math> </inline-formula>: A Practical Implementation of Tri-Transistor Ternary Logic Based on Inkjet-Printed Anti-Ambipolar Transistors and CMOSs of Thin-Film Structure
DC Field | Value | Language |
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dc.contributor.author | Kim, Jongbeom | - |
dc.contributor.author | Lee, Hyundong | - |
dc.contributor.author | Ko, Jonghyun | - |
dc.contributor.author | Kim, Bong Jun | - |
dc.contributor.author | Song, Taigon | - |
dc.date.accessioned | 2024-03-22T02:30:18Z | - |
dc.date.available | 2024-03-22T02:30:18Z | - |
dc.date.issued | 2023-12 | - |
dc.identifier.issn | 1549-8328 | - |
dc.identifier.issn | 1558-0806 | - |
dc.identifier.uri | https://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/159756 | - |
dc.description.abstract | The imminent rise in data consumption and the physical constraints of current advanced CMOS scaling hasten the end of the projection to the binary system. For a breakthrough of these issues, the ternary system, known for its superior efficiency in expressing numbers (closest to <inline-formula> <tex-math notation=LaTeX>$\mathrm{e}\approx$</tex-math> </inline-formula> 2.7183) has garnered considerable attention. Among the ternary studies reported, the anti-ambipolar transistor (AAT) is acquiring attention thanks to its unique negative differential resistance (NDR) and anti-ambipolar characteristics (AAC). Moreover, easy-to-fabricate inkjet-printing based AAT was introduced. Therefore, in this paper, we propose a practical design methodology (&#x2018;<inline-formula> <tex-math notation=LaTeX>$\mathbf{T^3L:} $</tex-math> </inline-formula> <bold>The Tri-transistor Ternary Logic</bold>&#x2019;) and a set of novel ternary logic based on inkjet-printed AATs and CMOSs. In detail, 1) We propose balanced ternary full adders (BTFA) and prove that inkjet-printed AATs and CMOSs are highly capable of implementing any kind of ternary logic. 2) We propose two design methodologies for ternary logic design: NDR-based Design Method I and AAC-based Design Method II. 3) We present optimization methodology for inkjet-printed ternary circuit stability and provide circuitry to secure sufficient noise margin. We provide a highly-compact BTFA design that requires only 64 transistors and an ultra-low-power BTFA design that reduces power by 84.7% to 98.8% compared to the previous designs. IEEE | - |
dc.format.extent | 14 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | <inline-formula> <tex-math notation=LaTeX>$\mathbf{T^3L}$</tex-math> </inline-formula>: A Practical Implementation of Tri-Transistor Ternary Logic Based on Inkjet-Printed Anti-Ambipolar Transistors and CMOSs of Thin-Film Structure | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1109/TCSI.2023.3311034 | - |
dc.identifier.scopusid | 2-s2.0-85171758634 | - |
dc.identifier.wosid | 001071948400001 | - |
dc.identifier.bibliographicCitation | IEEE Transactions on Circuits and Systems I: Regular Papers, v.70, no.12, pp 1 - 14 | - |
dc.citation.title | IEEE Transactions on Circuits and Systems I: Regular Papers | - |
dc.citation.volume | 70 | - |
dc.citation.number | 12 | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 14 | - |
dc.type.docType | Article | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordAuthor | anti-ambipolar transistor (AAT) | - |
dc.subject.keywordAuthor | CNTFETs | - |
dc.subject.keywordAuthor | Design methodology | - |
dc.subject.keywordAuthor | Multi-valued logic | - |
dc.subject.keywordAuthor | Multivalued logic | - |
dc.subject.keywordAuthor | Power demand | - |
dc.subject.keywordAuthor | Resistance | - |
dc.subject.keywordAuthor | Symbols | - |
dc.subject.keywordAuthor | ternary full-adder | - |
dc.subject.keywordAuthor | ternary logic | - |
dc.subject.keywordAuthor | Transistors | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/10252074 | - |
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