ScholarWorks@숙명여자대학교

초록

This study investigates Al-doped TiO2/Y2O3/ZrO2 trilayer capacitors grown by atomic layer deposition as a feasible material to scale high-k dielectric films for dynamic random-access memory (DRAM) capacitors. An ultrathin Y2O3 insertion layer (<0.5 nm) at the TiO2/ZrO2 interface facilitated the formation of a high-k tetragonal/cubic-like ZrO2 phase at ultrathin thicknesses, as verified by equivalent oxide thickness (EOT)-physical oxide thickness (POT) analysis, grazing-incidence X-ray diffraction, and transmission electron microscopy analysis. Such an enhanced crystallization enabled achieving a higher bulk k at a smaller POT and improved leakage properties. Postmetallization annealing (PMA) conditions were optimized for back-end-of-line compatibility, with PMA at 400 degrees C for 30 s in N-2 providing adequate interfacial curing, minimal EOT increase, and a lower leakage current. In contrast, PMA at 400 degrees C for 30 min resulted in EOT growth driven by intermixing, and PMA at 600 degrees C for 30 s enhanced crystallinity but increased leakage due to grain-boundary-assisted conduction. Temperature-dependent transport revealed that the dominant mechanism is bulk-limited Poole-Frenkel emission in the ZrO2 layer for both bias polarities, while the leakage magnitude is modulated by asymmetric injection conditions at the Ru/Al-doped TiO2 and ZrO2/TiN interfaces. Poole-Frenkel analysis yielded a consistent trap depth of similar to 1.1 eV and physically reasonable optical dielectric constants for ZrO2-based dielectrics. With Y2O3 insertion and short-time PMA at 400 degrees C, the Al-doped TiO2/Y2O3/ZrO2 film achieved a minimum EOT of similar to 0.63 nm at a POT of similar to 6.0 nm, outperforming other ZrO2-based stacks at comparable thickness while maintaining acceptable leakage. Overall, interfacial Y2O3 insertion combined with optimized PMA provided a practical pathway to achieve a lower POT at a given EOT in rutile TiO2-based next-generation DRAM capacitors.

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