Low Cost Convolutional Neural Network Accelerator Based on Bi-Directional Filtering and Bit-Width Reduction
DC Field | Value | Language |
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dc.contributor.author | Choi, Woong | - |
dc.contributor.author | Choi, Kyungrak | - |
dc.contributor.author | Park, Jongsun | - |
dc.date.accessioned | 2022-04-19T09:42:58Z | - |
dc.date.available | 2022-04-19T09:42:58Z | - |
dc.date.issued | 2018-03 | - |
dc.identifier.issn | 2169-3536 | - |
dc.identifier.uri | https://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/146937 | - |
dc.description.abstract | This paper presents a low-area and energy-efficient hardware accelerator for the convolutional neural networks (CNNs). Based on the multiply-accumulate-based architecture, three design techniques are proposed to reduce the hardware cost of the convolutional computations. First, to reduce the computational cost of convolutions, an adaptive bit-width reduction combined with near-zero skipping is proposed based on differential input method (DIM). The DIM-based design technique can reduce 62.5% of operation bit-width and improve 17.0% of activation sparsity with almost ignorable CNN accuracy degradation. Second, it has been found that adopting a bi-directional filtering window in a CNN accelerator can considerably reduce the energy for data movement with a much smaller number of memory accesses. To expedite the bi-directional filtering operations, we also propose a bi-directional first-input-first-output (bi-FIFO). With SRAM bit-cell layout manner, the proposed bi-FIFO facilitates fast data re-distribution with area and energy efficiency. To verify the effectiveness of the proposed techniques, the AlexNet accelerator has been designed. The numerical results show that the proposed adaptive bit-width reduction scheme achieves 34.6% and 58.2% of area and energy savings, respectively. The bi-FIFO-based accelerator also | - |
dc.format.extent | 13 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | Low Cost Convolutional Neural Network Accelerator Based on Bi-Directional Filtering and Bit-Width Reduction | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1109/ACCESS.2018.2816019 | - |
dc.identifier.scopusid | 2-s2.0-85043757720 | - |
dc.identifier.wosid | 000429017600001 | - |
dc.identifier.bibliographicCitation | IEEE Access, v.6, pp 14734 - 14746 | - |
dc.citation.title | IEEE Access | - |
dc.citation.volume | 6 | - |
dc.citation.startPage | 14734 | - |
dc.citation.endPage | 14746 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.identifier.url | https://www.webofscience.com/wos/woscc/full-record/WOS:000429017600001 | - |
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