ScholarWorks@Sookmyung Women's University: Choi, Woong

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Choi, Woong (최웅)

Engineering (Division of Materials Science and Electr)

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Tel 02-2077-7731
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SRAM:5||Logic gates:3||Transient response:2||MOS devices:2||Switches:2||Sensors:2||lowpower:2||Capacitors:2||Wide load range:2||Radix4 Booth multiplier:2||Boosting:2||Discharges (electric):2||load regulation:2||CAM:1||CLLDO:1||Capless LDO:1||Capacitance:1||Capacitorless lowdropout regulator (LDO):1||Circuit stability:1||ClassAB:1||Computer architecture:1||Couplings:1||DC level shift:1||DCDC power converters:1||Delays:1||Detection coil:1||Dynamic Power Transistor:1||Fast transient response:1||Feedback loop:1||Gain:1||High voltage conversion ratio:1||Highvoltage techniques:1||Hybrid power systems:1||Hybrid switching converter:1||Impedance:1||InMemory Computing:1||Inmemory computing (IMC):1||Inductors:1||Integrated circuits:1||LDO:1||Low output voltage:1||MAC:1||Metal object detection:1||Microprocessors:1||Monte Carlo:1||Ncurve:1||Neuromorphic system:1||Next generation memory device:1||PSRR:1||Periodic structures:1||Phasevoltage variation:1||Posit:1||Power demand:1||ProcessingInmemory:1||Rail to rail amplifiers:1||Rail to rail inputs:1||Read Disturb:1||Short Pulse WL:1||Sorting:1||Stability analysis:1||Steadystate:1||Stochastic Adder:1||Stochastic Computing:1||Stress:1||Switching loss:1||TCAM:1||Tail:1||Topology:1||Transfer functions:1||Transient analysis:1||Transistors:1||Transposable:1||VMIN:1||Viterbi decoder:1||Voltage:1||Voltage control:1||Wireless power transfer system:1||approximate adder:1||assist:1||barrel shifter:1||bidirectional barrel shifter:1||bit reconfigurable SARADC:1||burst operation:1||capacitive coupling:1||charge domain compute:1||chargerecycling:1||clamper:1||compact singlestage buffer amplifier (AMP):1||compound gate:1||computeinmemory (CIM):1||content addressable memory (CAM):1||convolutional neural network:1||deep neural network:1||detectencoder:1||domain wall memory:1||dual carry prediction:1||dual loop:1||dynamic gate:1||eDRAM:1||embedded memory:1||energy efficiency:1||fast fourier transform (FFT):1||fast transient response:1||gain cell:1||halfselect problem:1||high PSRR:1||high efficiency:1||high slew rate (SR):1||highpowersupplyrejection (PSR) ratio:1||input and output railtorail:1||leakage:1||line regulation:1||logiccompatible eDRAM:1||loop gain:1||low  power arithmethic circuit:1||low ripple:1||lowcost hardware design:1||memory:1||multiple feedback loops:1||nearthreshold voltage:1||onchip learning:1||overlap:1||read stability:1||reference voltage:1||reference voltage generator:1||segmented ML:1||sensing margin:1||shared bitline:1||single inductor bipolar output converter:1||single pole:1||singlepath:1||sparse coding:1||spike timing dependent plasticity (STDP):1||spiking neural network:1||stability:1||stability analysis:1||subthreshold logics:1||ternary CAM (TCAM).:1||transient response:1||typeIII compensator:1||ultralow voltage:1||variation:1||voltagemode dcdc converter:1||wide output capacitor:1||wide range capacitive load:1||write ability:1||write margin (WRM):1||3dB bandwidth:1||yield:1||2T gain cell:1||Access disturb margin (ADM):1||Active leakage energy:1||Active matrix organic light emitting diodes:1||Activematrix organic lightemitting diode (AMOLED):1||Adaptive sensing:1||Analog LDO:1||Applicationspecific memory:1||Assist:1||Bandwidth:1||Binarized neural network:1||Bitline Computing:1||

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Sookmyung Women's University. Cheongpa-ro 47-gil 100 (Cheongpa-dong 2ga), Yongsan-gu, Seoul, 04310, Korea02-710-9127

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