Optimizing Performance Using GPU Cache Data Residency Based on Application’s Access Patterns
- Authors
- Adufu, Theodora; Kim, Yoonhee
- Issue Date
- Sep-2023
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Keywords
- Data Residency; Frequently Accessed Data; Static Profiling
- Citation
- APNOMS 2023 - 24th Asia-Pacific Network Operations and Management Symposium: Intelligent Management for Enabling the Digital Transformation, pp 42 - 47
- Pages
- 6
- Journal Title
- APNOMS 2023 - 24th Asia-Pacific Network Operations and Management Symposium: Intelligent Management for Enabling the Digital Transformation
- Start Page
- 42
- End Page
- 47
- URI
- https://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/159034
- ISSN
- 0000-0000
- Abstract
- Memory management is a significant aspect of executing applications on GPUs even in the cloud environment. With the advancements in GPU architecture, issues such as data reuse, cache line eviction and data residency are to be considered when optimal performance for concurrently running applications. Frequency of data access from global memory has significant impact on the performance of the application with increased latencies when accesses result in cache misses. Through static profiling, we identify the access patterns to the global memory and investigate the relationship between frequent access patterns and data residency in the cache. From our investigations, we observed that each application frequently accesses a data region in memory though the range of addresses accessed differ. We evaluated our estimated set-aside area for LSTM and CSR applications. Executions using our proposed estimations shows a speed-up in the performance LSTM (1.004x) while CSR experienced a slow-down (0.998x) when both were co-executed with their respective estimated set-aside areas. Copyright 2023 KICS.
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