A Pseudo Single-Stage Amplifier With an Adaptively Varied Medium Impedance Node for Ultra-High Slew Rate and Wide-Range Capacitive-Load Drivability
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Hong, Sung-Wan | - |
dc.contributor.author | Cho, Gyu-Hyeong | - |
dc.date.available | 2021-02-22T06:13:09Z | - |
dc.date.issued | 2016-09 | - |
dc.identifier.issn | 1549-8328 | - |
dc.identifier.issn | 1558-0806 | - |
dc.identifier.uri | https://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/3231 | - |
dc.description.abstract | This paper presents a pseudo single-stage (PSS) amplifier with an adaptively varied medium impedance node to achieve an ultra-high slew rate (SR) and at the same time stable operation in a wide capacitive load range. Owing to the characteristics of the proposed technique, this amplifier achieves a 1.1-to-8.67 V/μs slew rate and a 0.01-to-1.66 MHz unity gain frequency over a 0.1-to-15 nF capacitive load (C L ) with an over 69° phase margin while consuming a total quiescent power of only 7.4 μW. This chip was fabricated in a 0.18 μm CMOS process with a silicon area of 0.0021 mm 2 . | - |
dc.format.extent | 12 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A Pseudo Single-Stage Amplifier With an Adaptively Varied Medium Impedance Node for Ultra-High Slew Rate and Wide-Range Capacitive-Load Drivability | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1109/TCSI.2016.2584919 | - |
dc.identifier.scopusid | 2-s2.0-84988667056 | - |
dc.identifier.wosid | 000385621800002 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.63, no.10, pp 1567 - 1578 | - |
dc.citation.title | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
dc.citation.volume | 63 | - |
dc.citation.number | 10 | - |
dc.citation.startPage | 1567 | - |
dc.citation.endPage | 1578 | - |
dc.type.docType | Article | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | sci | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | NESTED-MILLER COMPENSATION | - |
dc.subject.keywordPlus | 3-STAGE AMPLIFIER | - |
dc.subject.keywordPlus | FREQUENCY COMPENSATION | - |
dc.subject.keywordPlus | MULTISTAGE AMPLIFIERS | - |
dc.subject.keywordPlus | BUFFER AMPLIFIER | - |
dc.subject.keywordPlus | DRIVERS | - |
dc.subject.keywordPlus | TIME | - |
dc.subject.keywordAuthor | Adaptively varied medium impedance | - |
dc.subject.keywordAuthor | high slew rate | - |
dc.subject.keywordAuthor | pole-zero doublets | - |
dc.subject.keywordAuthor | pseudo single-stage | - |
dc.subject.keywordAuthor | wide-range capacitive load drivability | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/7571153 | - |
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