Detailed Information

Cited 0 time in webofscience Cited 0 time in scopus
Metadata Downloads

A Pseudo Single-Stage Amplifier With an Adaptively Varied Medium Impedance Node for Ultra-High Slew Rate and Wide-Range Capacitive-Load Drivability

Authors
Hong, Sung-WanCho, Gyu-Hyeong
Issue Date
Sep-2016
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Adaptively varied medium impedance; high slew rate; pole-zero doublets; pseudo single-stage; wide-range capacitive load drivability
Citation
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.63, no.10, pp 1567 - 1578
Pages
12
Journal Title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume
63
Number
10
Start Page
1567
End Page
1578
URI
https://scholarworks.sookmyung.ac.kr/handle/2020.sw.sookmyung/3231
DOI
10.1109/TCSI.2016.2584919
ISSN
1549-8328
1558-0806
Abstract
This paper presents a pseudo single-stage (PSS) amplifier with an adaptively varied medium impedance node to achieve an ultra-high slew rate (SR) and at the same time stable operation in a wide capacitive load range. Owing to the characteristics of the proposed technique, this amplifier achieves a 1.1-to-8.67 V/μs slew rate and a 0.01-to-1.66 MHz unity gain frequency over a 0.1-to-15 nF capacitive load (C L ) with an over 69° phase margin while consuming a total quiescent power of only 7.4 μW. This chip was fabricated in a 0.18 μm CMOS process with a silicon area of 0.0021 mm 2 .
Files in This Item
Go to Link
Appears in
Collections
ICT융합공학부 > 전자공학전공 > 1. Journal Articles

qrcode

Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.

Altmetrics

Total Views & Downloads

BROWSE